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N-channel MOSFETs fabricated on SiGe dots for strain-enhanced mobility

  V. Jovanović, C. Biasotto, L. K. Nanver, J. Moers, D. Grützmacher, J. Gerharz, G. Mussler, J. van der Cingel, J. J. Zhang, G. Bauer, O. G. Schmidt, L. Miglio
IEEE Electron Dev. Lett. 31, 1083 (2010) URL PDF
 
  Abstract  
 

The silicon germanium dots grown in the Stranski–Krastanow mode are used to induce biaxial tensile strain in a silicon capping layer. A high Ge content and correspondingly high Si strain levels are reached due to the 3-D growth of the dots. The n-channel MOS devices, referred to in this letter as DotFETs, are processed with the main gate segment above the strained Si layer on a single dot. To prevent the intermixing of the Si/SiGe/Si structure, a novel low-temperature FET structure processed below 400°C has been implemented: The ultrashallow source/drain junctions formed by excimer-laser annealing in the full-melt mode of ion-implanted dopants are self-aligned to a metal gate. The crystallinity of the structure is preserved throughout the processing, and compared to reference devices, an average increase in the drain current of up to 22.5% is obtained.

 
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